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Frog Pacemaker

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ESP32-based benchtop pacemaker with adaptive sensing and pacing.

ESP32C++Analog CircuitrySignal ProcessingInterrupts
Frog Pacemaker Circuit

Overview

Designed an ESP32-based benchtop pacemaker that senses heart activity and delivers pacing pulses when the heart rate drops below a set threshold. The system features a custom analog front-end for ECG acquisition and runs a real-time firmware using FreeRTOS to ensure precise timing.

Key Challenges & Solutions

Adaptive Threshold Algorithm

Implemented the Pan-Tompkins algorithm for QRS detection. To handle baseline wander and varying signal amplitudes, we developed an adaptive thresholding logic that dynamically adjusts the comparator voltage based on the moving average and standard deviation of the last 10 R-peaks (`Avg - 0.7*StdDev`).

Real-Time Pacing Logic

Used FreeRTOS tasks to separate signal acquisition from the pacing logic. We utilized `xTimerCreate` for precise pulse duration control (Chronaxie) and `xTaskGetTickCount` to enforce the Lower Rate Interval (LRI), ensuring the device never misses a beat.

Hardware-Software Integration

We interfaced the ESP32's internal DAC to generate the dynamic threshold voltage for the analog comparator. This allowed the software to close the loop with the hardware, automatically adjusting the trigger level to filter out noise while capturing valid heartbeats.

Outcome

The device successfully paced a real frog heart model, maintaining the target heart rate and correctly discharging pulses when intrinsic activity was not detected.